Hamming Code Circuit

(Detection)
Mike Ra Caroline Choi Thuy Nguyen Christopher Gobok

Advisor: Dave Parent May 11, 2005

Agenda
Introduction to Hamming Code Project Specifications Project Details (Schematic, Layout, etc.) Cost Analysis Conclusion/Lessons Learned

What is Hamming Code?

Error detection scheme Utilizes multiple parity bits to generate a codeword that corresponds to the error bit. (Consistent with other error correction and detection schemes, where there is an increase in overhead). Correction is possible through hardware or software
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Block Diagram
4 ENCODER 4 7 DECODER 3

Specifications:
Encoder:
input 4 data bits output 7 data bits

Decoder:
input 7 data bits output 4 data bits & 3 codeword bits

Circuit Specs:
Clock Frequency : 200Mhz Supply Voltage : 5 V Load Capacitance : 30fF
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Longest Path Calculations

Logic Level 1 2 3 4 5 6 7 8 9 10 Gate Sub_X_1 Inv_1 Sub_X_2 Inv_2 Sub_X_3 Inv_3 Sub_X_4 Inv_4 Sub_X_5 Inv_5 Cg to #CDn #CDp Nsn Nsp Drive 30.00 4 6 2 2 29.20 1 1 1 1 8.16 4 6 2 2 14.30 1 1 1 1 10.50 4 6 2 2 15.90 1 1 1 1 8.55 4 6 2 2 14.50 1 1 1 1 9.32 4 6 2 2 15.10 1 1 1 1 Wn 6.26 2.05 3.04 2.36 3.39 2.16 3.10 2.91 3.21 2.19 Wp 10.90 2.75 5.59 3.08 5.91 2.84 5.39 3.25 5.59 2.95 Cg of Gate 29.2 8.16 14.3 10.5 15.9 8.55 14.5 9.32 15.1 8.8

Note: All widths are in microns and capacitances in fF

XPHL= XPLH = (5ns)/(14LL) = 0.35ns

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Schematic

Layout

Verification

Verification

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Simulation

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Simulation

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Cost Analysis
Verifying logic Verifying timing Layout Post extracted timing # of hours spent 12 25 40 3 -----------------Total = 80 hours

@ a rate of $150/hr, this project would have cost $12,000!

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Summary
Complete Circuit:
Clock Frequency : 315 Mhz Area : 289.95 x 151.5 microns Power : 3.78 mW Load Capacitance : 30 fF

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Conclusion/Lessons Learned
Start Early Expose yourself to the tool before starting Layout Design in blocks (cell based) and then instantiate them to minimize error Test at every different phase Ask other students with experience for help

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Acknowledgements /References
Thanks to Dr. Parent Thanks to John (Dr. Parents T.A.) Fellow Students
Ando, Hisashige & Fujibu Ltd. F4 Microprocessor Design Forum. Robust Design Solutions for Nano-scale Circuits. 2005 Rowan University. Electronics II VLSI Design Lab 6 The Design and Layout of an Encoder/Decoder that Simulates the Hamming Error Correcting Code. http://users.rowan.edu/~head/spring05/vlsi/ ADK_HAMMING_Lab6_S05.doc Unv. Of New Brunswick. EE4253 Digital Communications. Error Correction and the Hamming Code. http://www.ee.unb.ca/ /tervo/ee4253/hamming.htm. 2002
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